| dc.description.abstract | Many computing systems used in applications of critical systems utilize fault tolerance criteria for normally continuing to operate. Operating in the presence of faults is required in many applications for safety and reliability such as in electric power distribution systems, telecommunications, medical life-support, nuclear reactor control, transportation, automotive, aircraft, and space vehicles. Such systems require continuity and reliability of service. One of the used techniques for meeting the severe reliability requirements inherent in certain future computer application is the use of Triple Modular Redundant (TMR) configuration. Essentially, this technique depends on voting two out of three system output levels. In this paper a fault-tolerant system is proposed using TMR configuration for processors and memory modules with spare model for - line self - reconfiguration. A voter is designed to pass reliable data and signals between processors and memory modules. The voter has the capability to analyze the error and stop the system on the proper time. The proposed system is designed at register level and tested using MATLAB simulation. A set of different faults are injected in different modules of the system in different data pater. The simulation results present the accuracy and capability of the proposed system with respect to faults as well as the ability of errors handing. | en_US |
